Multi-layer semiconductor devices include a plurality of dice stacked and adhered with electrical connections extending therebetween. In one example, the stacked device is formed from two or more wafers (including a plurality of dice therein) that are coupled together at interfaces between the two or more wafers. The coupled wafers are diced and wire bonded to form the plurality of devices.
In some examples, some of the dice (e.g., chips within the dice) of the wafers are defective and unusable. These defective dice are still incorporated into the multi-layered semi-conductor devices by virtue of coupling between the wafers and the resulting devices are also defective and unusable even where many of the other dice within the devices are otherwise fully usable. Accordingly, wafer based fabrication decreases the overall yield of usable multi-layer devices.
In other examples, interconnections between dice within a multi-layered semi-conductor device are provided through wirebonding between the various layers. For instance, two or more semiconductor dice are stacked (e.g., adhered) on a substrate and electrical wires extend along the wire bond pads of the semi-conductor dice to the substrate. On the substrate the electrical interconnections are further routed to the ball grid arrays on the other side of the substrate. The stacked semiconductor dice are molded to protect both the dice and the electrical wires. The electrical wires provide indirect coupling between two or more layers of the multi-layered device. The indirect coupling between two or more of the layers with bond wires limits data and power transmission (e.g., the speed of data transmission and corresponding performance). Additionally, the introduction of a substrate and mold cap over the stacked dice increases the height (z height) of a multi-layered device.
Improved multi-layer fabrication techniques and faster interconnection techniques between layers are desirable that address these and other technical challenges.